JUNE 18–22, 2017

Session Details

Name: Tutorial 06: Introduction to Power Optimization Techniques in HPC
Time: Sunday, June 18, 2017
09:00 am - 06:00 pm
Room:   Kolleg
Messe Frankfurt
Breaks:08:00 am - 10:00 am Welcome Coffee
11:00 am - 11:30 am Coffee Break
01:00 pm - 02:00 pm Lunch
04:00 pm - 04:30 pm Coffee Break
Presenter:   Sharda Dixit, C-DAC
  Soham Ghosh, C-DAC
  Vinodh Kumar Markapuram, C-DAC
  Amarjeet Sharma, C-DAC
Abstract:   Power consumption has become a challenging issue in high performance computing in terms of both capital and operational expenditure. It has also become a key constraint for future HPC system designs. The open challenges in power optimization such as scalability and platform independence require collaborative efforts. The tutorial is aimed at developing expertise in the area of HPC power optimization and widening community to foster and accelerate efforts in addressing existing and future application design challenges. It also targets to spread awareness about optimal utilization of power in data centres and HPC clusters to minimize the overall energy consumption. The tutorial covers 1) Current state-of-the-art and future challenges in power optimization, 2) Power measurement methodologies, and 3) Basic power optimization techniques. It will be followed by a hands-on session on experimenting with power measurement and optimization techniques using RAPL and PowerAPI. It will be beneficial for HPC system-administrators, developers of power optimization solutions and scientific applications and others interested in this domain. They will be exposed to the potential power savings possible, using techniques such as workload-based frequency scaling, idle node shutdown, power-capping etc. Future versions of this tutorial will discuss advanced power saving techniques.