| Abstract: |
|
High performance systems are increasingly built using a combination of compute and workload acceleration provided by devices such as GPGPUs and FPGAs. One of the fundamental requirements to successfully leverage these technologies is a high performance interconnect capable of providing both low latency and high bandwidth, as well as, coherent memory access shared with host system memory. In this session we will cover CCIX, the most recent industry standardization effort around cache coherent interconnects. |
|
