Presentation
Gauss Award Winning Paper: On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors
Event Type
Hans Meuer Award Finalists
Research Paper
Computer Architecture
Energy consumption
Performance Analysis and Optimization
TimeMonday, June 25th5:30pm - 6pm
LocationPanorama 1
DescriptionThis paper presents refinements to the execution-cache-memory
performance model and a previously published power model for multicore
processors. The combination of both enables a very accurate prediction
of performance and energy consumption of contemporary multicore processors
as a function of relevant parameters such as active cores as well as core
and Uncore frequencies. Model validation is performed
on the Sandy Bridge-EP and Broadwell-EP microarchitectures.
Production-related variations in chip quality are
demonstrated through a statistical analysis of the fit parameters
obtained on a hundred Broadwell-EP CPUs of the same model. Insights
from the models are used to explain the performance- and
energy-related behavior of the processors for scalable as well as
saturating (i.e., memory-bound) codes. In the process we show the models' capability to
identify optimal operating points with respect to highest performance, lowest
energy-to-solution, and lowest energy-delay product and identify a set of
best practices for energy-efficient execution.
performance model and a previously published power model for multicore
processors. The combination of both enables a very accurate prediction
of performance and energy consumption of contemporary multicore processors
as a function of relevant parameters such as active cores as well as core
and Uncore frequencies. Model validation is performed
on the Sandy Bridge-EP and Broadwell-EP microarchitectures.
Production-related variations in chip quality are
demonstrated through a statistical analysis of the fit parameters
obtained on a hundred Broadwell-EP CPUs of the same model. Insights
from the models are used to explain the performance- and
energy-related behavior of the processors for scalable as well as
saturating (i.e., memory-bound) codes. In the process we show the models' capability to
identify optimal operating points with respect to highest performance, lowest
energy-to-solution, and lowest energy-delay product and identify a set of
best practices for energy-efficient execution.
Authors
Senior Researcher
Full Professor