Presentation
Workshop on Performance Portable Programming Models for Accelerators (P^3MA)
Workshop Organizers
Event Type
Workshop
TimeThursday, June 28th2pm - 6pm
LocationGigabyte
DescriptionAs the HPC community approaches exascale platforms, heterogeneity in compute and memory hierarchies is in most cases either remaining or increasing in complexity. High-level programming models aim to provide scientific applications a solution to maintain expected performance on diversifying systems with a minimal loss of portability or programmer productivity. Directives represent a traditional approach to high-level portability abstractions, with other successful strategies including Domain Specific Languages (DSLs), C++ metaprogramming, and runtime APIs. Although these approaches attempt to introduce abstraction without performance penalty, challenges remain with their designs, implementations, and ease-of-use on rapidly evolving hardware and diverse memory subsystems.
Programming methods to address these concerns are continuously being developed within standards committees for C++, OpenCL, OpenMP, OpenACC, and various DSLs. This workshop is designed to assess improved features of programming models designed for performance portability and productivity on heterogeneous systems, their implementations, and experiences with their deployment in HPC applications.
As in the past years, this workshop will provide a forum to bring together researchers and developers to examine heterogeneous computing and how it has been evolving across an increasingly diverse set of accelerated architectures.
Programming methods to address these concerns are continuously being developed within standards committees for C++, OpenCL, OpenMP, OpenACC, and various DSLs. This workshop is designed to assess improved features of programming models designed for performance portability and productivity on heterogeneous systems, their implementations, and experiences with their deployment in HPC applications.
As in the past years, this workshop will provide a forum to bring together researchers and developers to examine heterogeneous computing and how it has been evolving across an increasingly diverse set of accelerated architectures.
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