Contributor Index

Diogo Marques is a PhD student at Instituto de Engenharia de Sistemas e Computadores, Investigação e Desenvolvimento em Lisboa (INESC-ID). His research interests are focused on insightful modelling of modern multi-core processors for performance, power and energy-efficiency, based on the Cache-Aware Roofline Model (CARM), aiming at providing a set of novel modeling methodologies for accurate application characterization and optimization. The outcomes of his work are currently used to improve Intel Advisor CARM insightfulness, aiming at providing a more accurate characterization of real-world applications, in order to easily identify the main bottlenecks that limit their performance. In addition, some of these outcomes were also published in the proceedings of International Conference on High Performance Computing & Simulation (HPCS), in collaboration with Intel and presented at several tutorials at international scientific events, such as SC’18, ISC’17, SC’17, PACT’18 and ISPASS’18.