Presentation
HPC Beyond Moore’s Law
SessionTuesday Keynote
Speaker
Event Type
Keynote
Computer Architecture
Heterogeneous Systems
Post Moore’s Law Computing
TimeTuesday, June 18th5:15pm - 6pm
LocationPanorama 2
DescriptionMoore’s Law is a techno-economic model that has enabled the Information Technology (IT) industry to nearly double the performance and functionality of digital electronics roughly every two years within a fixed cost, power and area. Within a decade, the technological underpinnings for the process Gordon Moore described will come to an end as lithography gets down to atomic scale. At that point, it will be feasible to create lithographically produced devices with characteristic dimensions in the 3nm5nm range. This range corresponds to a dozen or fewer Si atoms across critical device features and will therefore be a practical limit for controlling charge in a classical sense. The classical technological driver that has underpinned Moore’s law for the past 50 years is already failing and is anticipated to flatten by 2025. This talk provides an updated view of what a 2021-2023 system might look like and the challenges ahead, based on our most recent understanding of technology roadmaps. It also will discuss the tapering of historical improvements in lithography, and how it affects options available to continue scaling of successors to the first exascale machine
Speaker
Department Head for Computer Science Lawrence Berkeley National Laboratory