Presentation
Using FPGAs to Accelerating HPC and Data Analytics on Intel-Based Systems
Workshop Organizers
Event Type
Workshop
AI/Machine Learning/Deep Learning
HPC Accelerators
Heterogeneous Systems
Parallel Applications
Performance Analysis and Optimization
TimeThursday, June 20th2pm - 6pm
LocationMegabyte
DescriptionFPGAs are able to improve performance, energy efficiency and throughput by boosting computation, I/O and communication operations in HPC, data analytics (DA), and machine learning (ML) workloads and thus complement the general-purpose Intel Xeon CPUs.
Recent innovations in hardware and software technologies make FPGAs increasingly attractive for HPC and DA workloads. The technological progress includes new FPGA SoCs featuring multi-core CPUs, increasingly larger reconfigurable logic and many hardened floating-point DSP blocks, improved compiler technologies capable of targeting heterogeneous systems, and tools for transforming intermediate representation objects into a hardware description language. Parallel programming models and standard APIs (OpenCL, OpenMP) are evolving to address the programmability aspect, better expressing data parallelism and data dependencies.
The workshop will bring together software developers and technology experts to share challenges, experiences and best practices around the integration and use of FPGA devices in HPC and DA/ML workloads in an Intel-based HPC ecosystem. The workshop will cover strategies for migrating workloads onto FPGAs, performance comparison with GPUs and CPUs, aspects of productivity, performance portability, and scalability.
The keynote will give an overview and outlook of the near future of the use of FPGAs and GPUs in the Intel HPC ecosystem.
Recent innovations in hardware and software technologies make FPGAs increasingly attractive for HPC and DA workloads. The technological progress includes new FPGA SoCs featuring multi-core CPUs, increasingly larger reconfigurable logic and many hardened floating-point DSP blocks, improved compiler technologies capable of targeting heterogeneous systems, and tools for transforming intermediate representation objects into a hardware description language. Parallel programming models and standard APIs (OpenCL, OpenMP) are evolving to address the programmability aspect, better expressing data parallelism and data dependencies.
The workshop will bring together software developers and technology experts to share challenges, experiences and best practices around the integration and use of FPGA devices in HPC and DA/ML workloads in an Intel-based HPC ecosystem. The workshop will cover strategies for migrating workloads onto FPGAs, performance comparison with GPUs and CPUs, aspects of productivity, performance portability, and scalability.
The keynote will give an overview and outlook of the near future of the use of FPGAs and GPUs in the Intel HPC ecosystem.
Links
Workshop Organizers
HPC Application Engineer
head of the Supercomputing Dept.
Speakers
UF Site Director, NSF Center for Space, High-Performance, and Resilient Computing