Shaping Tomorrow

ISC 2020 Call for Research Papers

PLEASE NOTE: The Call for Research Papers is currently open for submission!
To download a PDF version of the Call for Research Papers, click here.

The ISC research paper sessions provide world-class opportunities for engineers and scientists in academia, industry and government to present and discuss issues, trends and results that will shape the future of high performance computing (HPC), Networking, Storage and AI/Machine Learning.

Submitted research paper proposals will be reviewed by the ISC 2020 Research Papers Committee, which is headed by Prof. Saday Sadayappan, University of Utah and Pacific Northwest National Laboratory, USA, with Brad Chamberlain, CRAY, USA, as Deputy Chair.

The ISC organizers as well as the German Gauss Center for Supercomputing will again sponsor the call for research papers with two awards for outstanding research papers: the Hans Meuer Award and the GCS Award. Each accepted paper will be considered for the awards. 
The Hans Meuer Award and the GCS Award winner will receive a cash prize of 5,000 Euros each.

Submit

Submissions will be accepted through Monday, October 21, 2019.

Attendance will require a Conference Pass.
*ISC will grant a 100% discount on the conference day pass to paper presenter on day of presentation.
Please find the ISC 2019 registration fees here. ISC 2020 registration fees will be published in January 2020.

Important Dates

  Full Submission Deadline  October 21, 2019, 11:59 pm AoE
  Author Rebuttals January 13 - January 18, 2020
  Notification of Acceptance February 5, 2020
  Camera-Ready Submission May 10, 2020
  Research Paper Sessions June 22 - June 24, 2020
  Final Presentation Slides in PDF due June 26, 2020

Chair - Saday Sadayappan

  Research Papers Chair      Saday Sadayappan, University of Utah and Pacific Northwest National Laboratory
  Research Papers Deputy Chair       Brad Chamberlain, CRAY
  Proceedings Chair      Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf
  Proceedings Deputy Chair       Hatem Ltaief, KAUST

 

AREAS OF INTEREST

The Research Papers Committee encourages the submission of high-quality papers reporting original work in theoretical, experimental, and industrial research and development. The ISC submission process will be divided into eight tracks this year.

Architectures, Networks & Infrastructure   Data, Storage & Visualization
  • Future design concepts of HPC systems
  • Multi-core & many-core systems
  • Heterogeneous systems
  • Other paradigms (including data flow computing, FPGAs, etc.)
  • Network technology
  • Domain-specific architectures
  • Memory technologies
  • Trends in the HPC chip market
  • Exascale computing
 
  • From big data to smart data
  • Memory systems for HPC & big data
  • File systems & tape libraries
  • Data-intensive applications
  • Databases
  • Visual analytics
  • In-situ analytics
HPC Applications   HPC Algorithms
  • Highly scalable applications
  • Convergence of simulations & big data
  • Scalability on future architectures
  • Workflow management
  • Coupled simulations
  • Industrial simulations
  • Implementations on GPUs & other accelerators
 
  • Innovative algorithms, discrete or continuous
  • Algorithmic-based fault tolerance
  • Communication-reducing & synchronization-reducing algorithms
  • Time-space trade-offs in algorithms
  • Energy-efficient algorithms
Programming Models & Systems Software   Artificial Intelligence & Machine Learning
  • Parallel programming paradigms
  • Tools and libraries for performance & productivity
  • Job management
  • Monitoring & administration tools
  • Productivity improvement
  • Power & energy management & scheduling
  • Resilience
 
  • Neural networks & HPC
  • Machine learning & HPC
  • AI & machine learning-oriented hardware​
  • Devising benchmarks for machine learning
  • Use cases
Performance Modeling & Measurement   Emerging Technologies
  • Performance models
  • Performance prediction & engineering
  • Performance measurement
  • Power consumption
  • Energy measurement & modelling
 
  • Quantum computing architecture
  • Software for quantum computing
  • Quantum algorithms
  • Quantum annealing

Note: Submissions on other innovative aspects of high performance computing are also welcome. You will be asked to pick a primary and a secondary track from the eight above for your submission.

SUBMISSION & REVIEW PROCESS

Submit

 

 
Submission (October 21, 2019)
 

Guidelines

Only accepted style: LNCS style (Springer’s website)

  • Single column format
  • Maximum 18 pages (including figures and references)
  • LaTeX document class OR Word template
  • Suitable for anonymous review
  • Incorrectly formatted papers will be excluded

It's allowed to put papers on ArXiv before submitting to ISC.

Review

Rebuttal phase (January 13-18, 2020)

  • Chance to respond to reviewer comments
  • Clarify misunderstandings
  • Written format
  • Authors receive instructions via email

Final decision (February 05, 2020)

  • Consideration of reviews and rebuttals
  • Discussion at research paper committee meeting
  • Notification of authors
TERMS & CONDITIONS
  • By submitting a paper, you agree to present the paper at ISC 2020 in Frankfurt, Germany.
  • The research paper sessions will be held from Monday, June 22 through Wednesday, June 24, 2020. Attendance will require a Conference Pass. Paper presenters need to be registered ISC 2020 participants.
  • The ISC organizers will grant a 100% discount on the conference day pass to one presenter per paper for the day of their presentation.
  • Travel, accommodation, registration fees and other such costs will not be covered by the ISC organizers.
PUBLICATIONS & SLIDES

The publication of the papers is managed by Proceedings Chair Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf with Hatem Ltaief , KAUST, as Proceedings Deputy Chair.

OPEN ACCESS PUBLICATION

LNCS

All accepted research papers will be published in the Springer‘s Lecture Notes in Computer Science (LNCS] series in Gold Open Access.

 

Gold OA makes the final version of a research paper freely and permanently accessible for everyone, immediately after publication. Paper submissions are required to be within 18 pages in LNCS style. For the camera-ready version, authors are automatically granted one extra page to incorporate reviewer comments.

Volumes published as part of the LNCS series are made available to the following indexing services: Conference Proceedings Citation Index (CPCI), part of Clarivate Analytics’ Web of Science, EI Engineering Index (Compendex and Inspec databases), ACM Digital Library, DBLP, Google Scholar, IO-Port, MathSciNet, Scopus, Zentralblatt MATH.]

PRESENTATION SLIDES FOR ATTENDEES

The ISC organizers will make the presentation slides available online a week after the event, provided as PDF files. ISC 2020 attendees will receive an e-mail with the access link.

  • Saday Sadayappan, Ohio State University, Department of Computer Science and Engineering, United States of America (Chair)
  • Bradford L. Chamberlain, Cray Inc., United States of America (Deputy Chair)

Architectures, Networks & Infrastructure

  • Dhabaleswar Panda, Ohio State University, United States of America (Chair)

Artificial Intelligence and Machine Learning

  • Bingsheng He, National University of Singapore, Singapore (Chair)
  • Woongki Baek, UNIST, South Korea

Data, Storage & Visualization

  • Suren Byna, Lawrence Berkeley National Lab, United States of America (Chair)
  • Philip Carns, Argonne National Laboratory, United States of America

Emerging Technologies

  • Sriram Krishnamoorthy, Pacific Northwest National Laboratory, (Chair)

HPC Algorithms

  • Anne Benoit, ENS Lyon, (Chair)
  • Umit Catalyurek, Georgia Institute of Technology, United States of America

HPC Applications

  • Dirk Pleiter, Forschungszentrum Juelich, (Chair)
  • Edouard Audit, CEA, France

Performance Modeling & Measurement

  • Felix Wolf, Technical University of Darmstadt, Germany (Chair)
  • Sudheer Chunduri, Argonne Leadership Computing Facility, United States of America

Programming Models & Systems Software

  • Huimin Cui, Institute of Computing Technology CAS, China (Chair)
  • Abhinav Bhatele, Lawrence Livermore National Laboratory, United States of America